Added FTZ optimizations and adjust pipeline float control handling for Qualcomm drivers
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@@ -547,6 +547,10 @@ struct Values {
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Specialization::Scalar};
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SwitchableSetting<bool> force_unsupported_extensions{linkage, false, "force_unsupported_extensions", Category::RendererExtensions};
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// Developer toggle to enable FTZ (flush-to-zero) optimizations for testing on
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// Qualcomm devices. Default false for safety; when true, pipeline code may
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// emit FTZ-friendly SPIR-V and allow fast-math transforms for Adreno GPUs.
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SwitchableSetting<bool> enable_ftz{linkage, false, "enable_ftz", Category::RendererExtensions};
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SwitchableSetting<bool> provoking_vertex{linkage, false, "provoking_vertex", Category::RendererExtensions};
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SwitchableSetting<bool> descriptor_indexing{linkage, false, "descriptor_indexing", Category::RendererExtensions};
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SwitchableSetting<bool> sample_shading{linkage, false, "sample_shading", Category::RendererExtensions, Specialization::Paired};
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@@ -73,15 +73,33 @@ Id EmitFPAdd64(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
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}
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Id EmitFPFma16(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) {
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return Decorate(ctx, inst, ctx.OpFma(ctx.F16[1], a, b, c));
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// Use OpFma only when fast-math is allowed. Some drivers/targets require
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// conservative separate mul+add semantics; when need_fastmath_off is true
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// we emit separate FMul + FAdd to avoid relying on fused behavior.
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if (!ctx.profile.need_fastmath_off) {
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return Decorate(ctx, inst, ctx.OpFma(ctx.F16[1], a, b, c));
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} else {
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const Id mul = ctx.OpFMul(ctx.F16[1], a, b);
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return Decorate(ctx, inst, ctx.OpFAdd(ctx.F16[1], mul, c));
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}
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}
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Id EmitFPFma32(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) {
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return Decorate(ctx, inst, ctx.OpFma(ctx.F32[1], a, b, c));
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if (!ctx.profile.need_fastmath_off) {
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return Decorate(ctx, inst, ctx.OpFma(ctx.F32[1], a, b, c));
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} else {
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const Id mul = ctx.OpFMul(ctx.F32[1], a, b);
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return Decorate(ctx, inst, ctx.OpFAdd(ctx.F32[1], mul, c));
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}
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}
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Id EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) {
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return Decorate(ctx, inst, ctx.OpFma(ctx.F64[1], a, b, c));
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if (!ctx.profile.need_fastmath_off) {
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return Decorate(ctx, inst, ctx.OpFma(ctx.F64[1], a, b, c));
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} else {
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const Id mul = ctx.OpFMul(ctx.F64[1], a, b);
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return Decorate(ctx, inst, ctx.OpFAdd(ctx.F64[1], mul, c));
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}
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}
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Id EmitFPMax32(EmitContext& ctx, Id a, Id b) {
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@@ -31,6 +31,10 @@ namespace Vulkan {
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struct GraphicsPipelineCacheKey {
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std::array<u64, 6> unique_hashes;
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FixedPipelineState state;
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// Per-pipeline float control choices (selected at pipeline key time).
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// 0 = disabled, 1 = enabled
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uint8_t use_ftz_f32{};
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uint8_t use_ftz_f16{};
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size_t Hash() const noexcept;
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@@ -41,7 +45,7 @@ struct GraphicsPipelineCacheKey {
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}
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size_t Size() const noexcept {
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return sizeof(unique_hashes) + state.Size();
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return sizeof(unique_hashes) + state.Size() + sizeof(use_ftz_f32) + sizeof(use_ftz_f16);
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}
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};
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static_assert(std::has_unique_object_representations_v<GraphicsPipelineCacheKey>);
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@@ -446,6 +446,26 @@ GraphicsPipeline* PipelineCache::CurrentGraphicsPipeline() {
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}
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graphics_key.state.Refresh(*maxwell3d, dynamic_features);
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// Decide per-pipeline FTZ (flush-to-zero) usage based on device float-controls
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// properties and a dedicated enable_ftz developer toggle. FTZ is gated to
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// Qualcomm drivers for initial testing to avoid widespread regressions.
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const bool enable_ftz_setting = Settings::values.enable_ftz.GetValue();
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const auto& float_control = device.FloatControlProperties();
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const bool has_khr_float_controls = device.IsKhrShaderFloatControlsSupported();
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const bool denorm_indep_all = float_control.denormBehaviorIndependence == VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_ALL;
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const bool denorm_indep_32 = denorm_indep_all || float_control.denormBehaviorIndependence == VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_32_BIT_ONLY;
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const bool is_qualcomm = device.GetDriverID() == VK_DRIVER_ID_QUALCOMM_PROPRIETARY;
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const bool allow_ftz = enable_ftz_setting && is_qualcomm;
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graphics_key.use_ftz_f32 = (has_khr_float_controls && (float_control.shaderDenormFlushToZeroFloat32 == VK_TRUE) && denorm_indep_32 && allow_ftz) ? 1 : 0;
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graphics_key.use_ftz_f16 = (has_khr_float_controls && (float_control.shaderDenormFlushToZeroFloat16 == VK_TRUE) && denorm_indep_all && allow_ftz) ? 1 : 0;
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if (allow_ftz && (graphics_key.use_ftz_f32 || graphics_key.use_ftz_f16)) {
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LOG_INFO(Render_Vulkan, "Enabling per-pipeline FTZ (fast-math) for Qualcomm device: f32={} f16={}",
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graphics_key.use_ftz_f32, graphics_key.use_ftz_f16);
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}
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if (current_pipeline) {
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GraphicsPipeline* const next{current_pipeline->Next(graphics_key)};
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if (next) {
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@@ -690,7 +710,15 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline(
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const auto runtime_info{MakeRuntimeInfo(programs, key, program, previous_stage)};
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ConvertLegacyToGeneric(program, runtime_info);
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const std::vector<u32> code{EmitSPIRV(profile, runtime_info, program, binding, this->optimize_spirv_output)};
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// Forward a pipeline-specific profile to the SPIR-V emitter so it can
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// enable/disable fast-math (FTZ) optimizations per-pipeline. We use the
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// GraphicsPipelineCacheKey's FTZ choice to decide whether to allow
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// fast-math. When fast-math is enabled we keep need_fastmath_off=false
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// (allow optimizations); otherwise we set it to true to prevent unsafe
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// transformations.
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Shader::Profile emit_profile = profile;
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emit_profile.need_fastmath_off = (key.use_ftz_f32 == 0);
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const std::vector<u32> code{EmitSPIRV(emit_profile, runtime_info, program, binding, this->optimize_spirv_output)};
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device.SaveShader(code);
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modules[stage_index] = BuildShader(device, code);
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if (device.HasDebuggingToolAttached()) {
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