[video_core] nvn descriptor layout fix (#3206)
Yxzx presumes this: // The NVN driver buffer (index 0) is known to pack the SSBO address followed by its size. But in MCI i`ve discovered that there are no sizes, both registers are GPU addresses (hence the 2.8gb allocation, it was an address actually) Method could be much simpler but for safety i`ve routed both old and new worlds. Reviewed-on: https://git.eden-emu.dev/eden-emu/eden/pulls/3206 Reviewed-by: Caio Oliveira <caiooliveirafarias0@gmail.com> Reviewed-by: Lizzie <lizzie@eden-emu.dev> Co-authored-by: xbzk <xbzk@eden-emu.dev> Co-committed-by: xbzk <xbzk@eden-emu.dev>
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@@ -1705,21 +1705,26 @@ Binding BufferCache<P>::StorageBufferBinding(GPUVAddr ssbo_addr, u32 cbuf_index,
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return NULL_BINDING;
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return NULL_BINDING;
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}
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}
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// xbzk: New size logic. Fixes MCI.
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// If ever the * comment below prove wrong, the 'if' block may be removed.
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const auto size = [&]() {
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const auto size = [&]() {
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const bool is_nvn_cbuf = cbuf_index == 0;
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const bool is_nvn_cbuf = cbuf_index == 0;
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// The NVN driver buffer (index 0) is known to pack the SSBO address followed by its size.
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if (is_nvn_cbuf) {
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if (is_nvn_cbuf) {
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const u32 ssbo_size = gpu_memory->Read<u32>(ssbo_addr + 8);
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// * The NVN driver buffer (index 0) is known to pack the SSBO address followed by its size.
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if (ssbo_size != 0) {
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const u64 next_qword = gpu_memory->Read<u64>(ssbo_addr + 8);
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return ssbo_size;
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const u32 upper_32 = static_cast<u32>(next_qword >> 32);
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// Hardware-based detection: GPU addresses have non-zero upper bits
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if (upper_32 == 0) {
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// This is a size field, not a GPU address
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return static_cast<u32>(next_qword); // Return lower_32
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}
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}
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}
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}
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// Other titles (notably Doom Eternal) may use STG/LDG on buffer addresses in custom defined
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// Fall through: either not NVN cbuf (Doom Eternal & +), or NVN but ssbo_addr+8 is a GPU address (MCI)
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// cbufs, which do not store the sizes adjacent to the addresses, so use the fully
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// mapped buffer size for now.
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const u32 memory_layout_size = static_cast<u32>(gpu_memory->GetMemoryLayoutSize(gpu_addr));
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const u32 memory_layout_size = static_cast<u32>(gpu_memory->GetMemoryLayoutSize(gpu_addr));
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// Cap at 8MB to prevent allocator overflow from misinterpreted addresses
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return (std::min)(memory_layout_size, static_cast<u32>(8_MiB));
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return (std::min)(memory_layout_size, static_cast<u32>(8_MiB));
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}();
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}();
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// Alignment only applies to the offset of the buffer
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// Alignment only applies to the offset of the buffer
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const u32 alignment = runtime.GetStorageBufferAlignment();
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const u32 alignment = runtime.GetStorageBufferAlignment();
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const GPUVAddr aligned_gpu_addr = Common::AlignDown(gpu_addr, alignment);
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const GPUVAddr aligned_gpu_addr = Common::AlignDown(gpu_addr, alignment);
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